AMD Unveils World’s Largest Flexible, Design-Based Chip

This morning, AMD showed another interesting product with the announcement of the new Versal Premium VP1902 adaptive SoC (System On Chip). Semiconductor chip design is complex and expensive. As such, there is a lot of simulation, drawing and verification that goes into making a very large processor, accelerator or platform, and that’s where FPGAs (Field Programmable Gate Arrays) come in. You can think of FPGAs as both a virtual reality and a sandbox for chip engineers to work on and simulate their designs in pre-fabricated silicon, before committing to the expensive process of tape-out and chip fab to create an ASIC (Application Specific IC) design. The beauty of FPGAs is that they can simulate complete, complex designs, but they can also be modified as further optimizations are achieved, new capabilities are added or chip errata are discovered and fixed.

Why You’re Building the World’s Largest Programmable, Flexible Chip

The most difficult limitation with FPGA technology is carrying the largest possible gates, so engineers can design and simulate larger, more complex types of market applications like AI, which is driving the unmet need for computing power and new functions. .

Built with TSCM’s 7nm process, AMD says the Versal Premium VP1902 adaptive SoC is the world’s largest, offering 18.5 million cells for 2X logic density and providing 2X combined IO bandwidth compared to previous Virtex UltraScale+ devices. In fact, AMD’s closest competitor, Intel, offers its Stratix 10 GX which tops out at 10M logic elements.

AMD took advantage of its Versal Premium logic density in a new quadrant design that relies on the same parts as the chipset, although with the VP1902, the high-speed NoC (Network on Chip) connects several parts that have all the functionality of the AMD- Xilinx Versal VP1902 FPGA. “Providing the basic computing technology to enable our customers is very important. For simulation and simulation, that means we can provide the highest access and performance possible,” notes Kirk Saban, Corporate VP, Product, Software, & Solutions Marketing, Adaptive and Embedded Computing Group, AMD. “Chip manufacturers can confidently prototype and demonstrate next-generation products using the VP1902 adaptive SoC, advancing tomorrow’s innovations in AI, autonomous vehicles, Industry 5.0 and other emerging technologies.”

Changing Performance and Software Tools Are Important to Customer Experience at the Time of Sale

In addition to the versatility and versatility of the Versal VP1902, AMD notes that its disruptive capabilities are “unparalleled,” with the aforementioned NoC supporting speeds up to 8X faster than the historical VU19P FPGA. AMD has also supported its Vivado ML tools with new tools that support development on the VP1902 FPGAs, with support for stable locking, design optimization, long-term bug fixes for many users, and improved final design integration, all in one. which empowers engineers with the ability to refine and improve their chip designs quickly and efficiently.

Overall, AMD’s acquisition of Xilinx has continued to show clear synergy, with Xilinx’s technology transformation spanning across major industry sectors, from the client and cloud data, to the automotive, aerospace and AI markets and more. Although Versal is Xilinx’s core software-focused technology where no other solution other than FPGA can address the unique, large-scale challenges of these designs, it’s clear that the integrated technology team continues to show strength and innovation.

AMD’s Versal Premium VP 1902 FPGAs will be sampling in Q3 ’23 and in production in the first half of 2024, with software development tools available in the second half of 2023.

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